Good Quality SFP Module – 10G Single Mode 40Km DDM | Dual Fiber SFP+ Transceiver JHA3940D – JHA

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Good Quality SFP Module – 10G Single Mode 40Km DDM | Dual Fiber SFP+ Transceiver JHA3940D – JHA Detail:

Features:

1). Supports 9.95 to 11.3Gb/s bit rates

2). Hot-Pluggable

3). Duplex LC connector

4). 1550nm cooled EML transmitter, PIN photo-detector

5). SMF links up to 40km

6). 2-wire interface for management specifications

compliant with SFF 8472 digital diagnostic monitoring interface

7). Power Supply :+3.3V

8). Power consumption<1.5W

9). Temperature Range: 0~ 70°C

10). RoHS compliant

Applications:

1). 10GBASE-ER/EW Ethernet

2). SONET OC-192 / SDH

3). 10G Fibre channel

Description:

JHA3940D is a very compact 10Gb/s optical transceiver module for serial optical communication applications at 10Gb/s. The JHA3940D converts a 10Gb/s serial electrical data stream to 10Gb/s optical output signal and a 10Gb/s optical input signal to 10Gb/s serial electrical data streams. The high speed 10Gb/s electrical interface is fully compliant with SFI specification.

The high performance 1550nm cooled EML transmitter and high sensitivity PIN receiver provide superior performance for Ethernet applications at up to 40km links.

The SFP+ Module compliants with SFF-8431, SFF-8432 and IEEE 802.3ae 10GBASE-ER. Digital diagnostics functions are available via a 2-wire serial interface, as specified in SFF-8472.

The fully SFP compliant form factor provides hot pluggability, easy optical port upgrades and low EMI emission.

• Absolute Maximum Ratings

Parameter	Symbol	Min.	Typical	Max.	Unit
Storage Temperature	T_S	-40		+85	°C
Case Operating Temperature	T_A	0		70	°C
Maximum Supply Voltage	Vcc	-0.5		4	V
Relative Humidity	RH	0		85	%

• Electrical Characteristics (T_OP = 0 to 70 °C, VCC = 3.135 to 3.465 Volts)

Parameter	Symbol	Min.	Typical	Max.	Unit	Note
Supply Voltage	Vcc	3.135		3.465	V
Supply Current	Icc			400	mA
Power Consumption	P			1.5	W
Transmitter Section:
Input differential impedance	R_in		100		Ω	1
Tx Input Single Ended DC Voltage Tolerance (Ref VeeT)	V	-0.3		4	V
Differential input voltage swing	Vin,pp	180		700	mV	2
Transmit Disable Voltage	V_D	2		Vcc	V	3
Transmit Enable Voltage	V_EN	Vee		Vee+0.8	V
Receiver Section:
Single Ended Output Voltage Tolerance	V	-0.3		4	V
Rx Output Diff Voltage	Vo	300		850	mV
Rx Output Rise and Fall Time	Tr/Tf	30			ps	4
LOS Fault	V_{LOS fault}	2		Vcc_HOST	V	5
LOS Normal	V_{LOS norm}	Vee		Vee+0.8	V	5

Note:

Connected directly to TX data input pins. AC coupling from pins into laser driver IC.
Per SFF-8431 Rev 3.0
Into 100 ohms differential termination.
20%～80%
LOS is an open collector output. Should be pulled up with 4.7k – 10kΩ on the host board. Normal operation is logic 0; loss of signal is logic 1. Maximum pull-up voltage is 5.5V.

• Optical Parameters(T_OP = 0 to 70°C, VCC = 3.135 to 3.465 Volts)

Parameter	Symbol	Min.	Typical	Max.	Unit	Note
Transmitter Section:
Center Wavelength	λt	1530	1550	1565	nm
spectral width	△λ			0.3	nm
Average Optical Power	Pavg	-1		+4	dBm	1
Optical Power OMA	Poma	-2.1			dBm
Laser Off Power	Poff			-30	dBm
Extinction Ratio	ER	6			dB
Transmitter Dispersion Penalty	TDP			3.0	dB	2
Relative Intensity Noise	Rin			-128	dB/Hz	3
Optical Return Loss Tolerance		20			dB
Receiver Section:
Center Wavelength	λr	1260		1600	nm
Receiver Sensitivity	Sen			-16	dBm	4
Stressed Sensitivity (OMA)	Sen_ST			-14	dBm	4
Los Assert	LOS_A	-27		-	dBm
Los Dessert	LOS_D			-17	dBm
Los Hysteresis	LOS_H	0.5			dB
Overload	Sat	0			dBm	5
Receiver Reflectance	Rrx			-26	dB

Note:

Average power figures are informative only, per IEEE802.3ae.
TWDP figure requires the host board to be SFF-8431compliant. TWDP is calculated using the Matlab code provided in clause 68.6.6.2 of IEEE802.3ae.
12dB reflection.
Conditions of stressed receiver tests per IEEE802.3ae. CSRS testing requires the host board to be SFF-8431 compliant.
Receiver overload specified in OMA and under the worst comprehensive stressed condition.

• Timing Characteristics

Parameter	Symbol	Min.	Typical	Max.	Unit
TX_Disable Assert Time	t_off			10	us
TX_Disable Negate Time	t_on			1	ms
Time to Initialize Include Reset of TX_FAULT	t_int			300	ms
TX_FAULT from Fault to Assertion	t_fault			100	us
TX_Disable Time to Start Reset	t_reset	10			us
Receiver Loss of Signal Assert Time	T_A,RX_LOS			100	us
Receiver Loss of Signal Deassert Time	T_d,RX_LOS			100	us
Rate-Select Chage Time	t_ratesel			10	us
Serial ID Clock Time	t_serial-clock			100	kHz

• Pin Assignment

Diagram of Host Board Connector Block Pin Numbers and Name

• Pin Function Definitions

PIN #	Name	Function	Notes
1	VeeT	Module transmitter ground	1
2	Tx Fault	Module transmitter fault	2
3	Tx Disable	Transmitter Disable; Turns off transmitter laser output	3
4	SDL	2 wire serial interface data input/output (SDA)
5	SCL	2 wire serial interface clock input (SCL)
6	MOD-ABS	Module Absent, connect to VeeR or VeeT in the module	2
7	RS0	Rate select0, optionally control SFP+ receiver. When high, input data rate >4.5Gb/ s; when low, input data rate <=4.5Gb/s
8	LOS	Receiver Loss of Signal Indication	4
9	RS1	Rate select0, optionally control SFP+ transmitter. When high, input data rate >4.5Gb/s; when low, input data rate <=4.5Gb/s
10	VeeR	Module receiver ground	1
11	VeeR	Module receiver ground	1
12	RD-	Receiver inverted data out put
13	RD+	Receiver non-inverted data out put
14	VeeR	Module receiver ground	1
15	VccR	Module receiver 3.3V supply
16	VccT	Module transmitter 3.3V supply
17	VeeT	Module transmitter ground	1
18	TD+	Transmitter inverted data out put
19	TD-	Transmitter non-inverted data out put
20	VeeT	Module transmitter ground	1

Note:

The module ground pins shall be isolated from the module case.
This pin is an open collector/drain output pin and shall be pulled up with 4.7K-10Kohms to Host_Vcc on the host board.
This pin shall be pulled up with 4.7K-10Kohms to VccT in the module.
This pin is an open collector/drain output pin and shall be pulled up with 4.7K-10Kohms to Host_Vcc on the host board.

• SFP Module EEPROM Information and Management

The SFP modules implement the 2-wire serial communication protocol as defined in the SFP -8472. The serial ID information of the SFP modules and Digital Diagnostic Monitor parameters can be accessed through the I²C interface at address A0h and A2h. The memory is mapped in Table 1. Detailed ID information (A0h) is listed in Table 2. And the DDM specification at address A2h. For more details of the memory map and byte definitions, please refer to the SFF-8472, “Digital Diagnostic Monitoring Interface for Optical Transceivers”. The DDM parameters have been internally calibrated.

Table 1. Digital Diagnostic Memory Map (Specific Data Field Descriptions)

Table 2 - EEPROM Serial ID Memory Contents (A0h)

Data Address	Length (Byte)	Name of Length	Description and Contents
Base ID Fields
0	1	Identifier	Type of Serial transceiver (03h=SFP)
1	1	Reserved	Extended identifier of type serial transceiver (04h)
2	1	Connector	Code of optical connector type (07=LC)
3-10	8	Transceiver	10G Base-ER
11	1	Encoding	64B/66B
12	1	BR, Nominal	Nominal baud rate, unit of 100Mbps
13-14	2	Reserved	(0000h)
15	1	Length(9um)	Link length supported for 9/125um fiber, units of 100m
16	1	Length(50um)	Link length supported for 50/125um fiber, units of 10m
17	1	Length(62.5um)	Link length supported for 62.5/125um fiber, units of 10m
18	1	Length(Copper)	Link length supported for copper, units of meters
19	1	Reserved
20-35	16	Vendor Name	SFP vendor name: JHA
36	1	Reserved
37-39	3	Vendor OUI	SFP transceiver vendor OUI ID
40-55	16	Vendor PN	Part Number: “JHA3940D” (ASCII)
56-59	4	Vendor rev	Revision level for part number
60-62	3	Reserved
63	1	CCID	Least significant byte of sum of data in address 0-62
Extended ID Fields
64-65	2	Option	Indicates which optical SFP signals are implemented(001Ah = LOS, TX_FAULT, TX_DISABLE all supported)
66	1	BR, max	Upper bit rate margin, units of %
67	1	BR, min	Lower bit rate margin, units of %
68-83	16	Vendor SN	Serial number (ASCII)
84-91	8	Date code	JHA’s Manufacturing date code
92-94	3	Reserved
95	1	CCEX	Check code for the extended ID Fields (addresses 64 to 94)
Vendor Specific ID Fields
96-127	32	Readable	JHA specific date, read only
128-255	128	Reserved	Reserved for SFF-8079

• Digital Diagnostic Monitor Characteristics

Data Address	Parameter	Accuracy	Unit
96-97	Transceiver Internal Temperature	±3.0	°C
98-99	VCC3 Internal Supply Voltage	±3.0	%
100-101	Laser Bias Current	±10	%
102-103	Tx Output Power	±3.0	dBm
104-105	Rx Input Power	±3.0	dBm

• Regulatory Compliance

The JHA3940D complies with international Electromagnetic Compatibility (EMC) and international safety requirements and standards (see details in Table following).

Electrostatic Discharge(ESD) to the Electrical Pins	MIL-STD-883EMethod 3015.7	Class 1(>1000 V)
Electrostatic Discharge (ESD)to the Duplex LC Receptacle	IEC 61000-4-2GR-1089-CORE	Compatible with standards
ElectromagneticInterference (EMI)	FCC Part 15 Class BEN55022 Class B (CISPR 22B)VCCI Class B	Compatible with standards
Laser Eye Safety	FDA 21CFR 1040.10 and 1040.11EN60950, EN (IEC) 60825-1,2	Compatible with Class 1 laserproduct.

• Recommended Circuit

Recommended Host Board Power Supply Circuit

Recommended High-speed Interface Circuit

• Mechanical Dimensions

JHA reserves the right to make changes to the products or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such products or information.

Published by Shenzhen JHA Technology Co., Ltd

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